19 Oct 2020 (0900 – 1300) – GMT +8
20 Oct 2020 (0900 – 1300) – GMT +8
For electronic devices, solder joints often are the weakest link in terms of reliability. The failure of solder joints may be caused by temperature, stress, electrical current, or chemical reactions, and may occur at level one and level two, depending on the device type and application conditions. In this course, the Part 1 will address the electromigration issue at die attach level for high power devices, and the Part 2 will address the solder joint behavior based on fundamental material properties and the failure modes will be introduced, with emphasis on lead-free solder joints.
19 Oct 2020 (1400 – 1730) – GMT +8
20 Oct 2020 (1400 – 1730) – GMT +8
The industry is evolving very rapidly, with multiple challenges emerging at the same time on soldering. The cost, the reliability, and the reduced process temperature. Any one failed to address any of those challenges will be left behind in this fierce competitive environment. This course will bring the answer to you, with the most updated information on the new solder materials developed, and will also help you to justify the selection of solder types which fit best for your applications. The course is divided into two parts, with part 1 addressing the cost and reliability, and part 2 address the low temperature soldering.
26 Oct 2020 (0900 – 1300) – GMT +8
27 Oct 2020(0900 – 1300) – GMT +8
With abundant case studies illustrating the principle and application of Design for Manufacturability (DFM) and Design for Reliability (DFR) in advanced soldering technology, you will be able to apply both on your SMT design and process of soldering job and achieve high yield and high reliability very easily, and also be ready to face the new challenges emerged.
2 Nov 2020 (0900 – 1300) – GMT +8
3 Nov 2020 (0900 – 1300) – GMT +8
Printed circuit boards (PCBs) are the baseline for electronics manufacturing upon which electronic components are mounted and formed into electronic systems. PCBs are used in a variety of electronic circuits from simple one-transistor amplifiers to large super computers. A PCB serves three main functions which is; a) it provides the necessary mechanical support for the components in the circuit; b) it provides the necessary electrical interconnections, and c) it bears some form of legend which identifies the components it carries. The failure modes on the PCBs can be categorized in a hierarchical structure, in which the mechanisms and causes are site or location dependant. This one day workshop will discuss a variety of failure mechanisms that effect the functionality of PCBs. These mechanisms can be related to how PCB materials are selected, PCBs are designed, manufactured, tested and used in the field conditions. The workshop will begin with an overview of PCB manufacturing, materials and processes. The workshop then provides the guideline for selection of methodologies for identifying potential failure mechanisms based on the failure history and how a systematic root cause failure analysis of the PCB can result in prevention of future issues.
2 Nov 2020 (0900 – 1300) – GMT +8
3 Nov 2020 (0900 – 1300) – GMT +8
In this workshop the detailed review of failure analysis methods and reliability testing in assembly will be discussed. Quickly finding and eliminating package defects and failures due to assembly issues is critical. Package reliability directly affects manufacturing yield, time to market, product performance, customer satisfaction and cost. Many process steps and controls are needed for a high yield and reliable assembly process. A through understanding of product and technology reliability principles and mechanisms of failure is essential. Knowledge of defects and failure mechanisms enables a high yielding successful assembly process through material choices, package design, process optimization, and thermo-mechanical considerations. Fault isolation, failure analysis, and materials analysis play a major role in the improvement of yield and reliability. Coordination of engineers from many disciplines is needed in order to achieve high yield and reliability. Each engineer needs to understand the impact of their choices and methods on the final product. This workshop will discuss, using examples, mechanical and thermal failure mechanisms in assembly and detection methods.
2 Nov 2020 (1400 – 1800) – GMT +8
4 Nov 2020 (0900 – 1300) – GMT +8
Participants in this workshop will receive a complete overview of current high volume manufacturing, HVM, wire bonding assembly process options and metrology challenges. Miniaturization of wire bonding is critical as the number of bond pads that must be placed per unit area increases. This requires a large leap in wire manufacturing capability and improved wire bonding tools. New challenging assembly processes including direct wirebonding to Cu pads on ULK materials will be discussed. Different methods of wire bonding such as thermosonic, ultrasonic and thermocompression will be covered in this workshop. Several options for Cu wire use are presented in the workshop. Using easy to understand terminology an in-depth review of wire bonding processes in assembly manufacturing and first level interconnects are presented. Package and assembly technologies, wire bonding quality including wire pull and sheer test are discussed in detail. Wire bonding for chip on board, COB, applications, organic substrates, wire bonding problems using Au, Al or Cu wire and tape automated bonding are part of the class. Wire bonding infrastructure is so extensive that no other chip-interconnection technology can completely displace wire bonding in the foreseeable future.
3 Nov 2020 (1400 – 1800) – GMT +8
4 Nov 2020 (0900 – 1400) – GMT +8
Flip chip packaging is not new but new technology requires more connections between the die and package, a tighter bump pitch and more functionally in the package. Tablets and smart phones all use flip chip packaging with thinned die and thin packages. All technology drivers bring new issues that must be addressed. These issues include new copper pillar bonding, bump stack material changes, tighter bump pitch, underfill flow and no-flow options, new under fill materials, thermal management with improved thermal interface materials (TIM), embedded passives, and die attach films. Wafer thinning processes and some stacked die package options will be reviewed. This workshop will begin with a discussion of current flip chip assembly. We will then discuss the new technology options and issues. The objective of this workshop is to provide an improved understanding of current flip chip package options and assembly flows. The newer HVM package material and design options are discussed. Wafer thinning and handling including bonding and debonding methods will be covered. Dicing and handling thin wafers and die will be covered. Newer bump materials will be discussed with their impact to flip chip or stacked die package assembly.
9 Nov 2020 (1400 – 1800) – GMT +8
10 Nov 2020 (1400 – 1800) – GMT +8
The journey through troubleshooting the most common defects in SMT with an emphasis on identifying the fundamental root causes, and an entertaining overview of best practices will be discussed in this workshop. This is based upon real-world problems encountered in troubleshooting process, equipment and materials problems throughout the electronics assembly industry all over the world. Case studies will be used throughout the workshop.
9 Nov 2020 (0900 – 1300) – GMT +8
10 Nov 2020 (0900 – 1300) – GMT +8
11 Nov 2020 (0900 – 1300) – GMT +8
12 Nov 2020 (0900 – 1300) – GMT +8
Failure analysis is a vital tool in the effort to ensure reliability of electronic products and systems throughout their product lifecycle. Today, organizations involved in activities within the electronics supply chain are facing new challenges, not just from complex assembly styles, harsher lifecycle environments, and more sophisticated tools, but also from customers who are demanding a quicker turn-around. Unfortunately, root cause failure analysis is often performed incompletely, leading to a poor understanding of failure mechanisms and causes, and loss of resources and customers due to recurrence of failures. The tools and techniques applied by many test and FA labs today are geared only towards uncovering the apparent causes of failure, not necessarily the root causes. Thus, the corrective actions applied by manufacturers or end-users do not always eliminate problems. This can result in expensive, time-consuming, repeat occurrences of failures. This two day workshop will discuss a range of topics, including root cause analysis, physics-of-failure principles and failure mechanisms in electronics. Specimen preparation techniques, non-destructive and destructive analysis, and materials characterization will also be discussed. The first day of the workshop will present methodologies for identifying potential failure mechanisms in electronics based on the failure history and, systematic approaches to root cause analysis. The second day will cover failure analysis techniques geared towards various failure mechanisms, along with numerous component and PCB assembly failure analysis case studies that illustrate the techniques and analysis. Failure analysis case studies will be used to illustrate the techniques and analysis principles to arrive at the root cause(s) of field failures on printed circuit boards, active components, and assemblies.
9 Nov 2020 (0900 – 1300) – GMT +8
10 Nov 2020 (0900 – 1300) – GMT +8
11 Nov 2020 (0900 – 1300) – GMT +8
12 Nov 2020 (0900 – 1300) – GMT +8
The SMT Electronics Assembly Class is a practical overview of the many different processes and materials used in through-hole and surface mount technologies (SMT). It is a focused two-day long workshop, which provides attendees with the opportunity to learn and understand the processes, equipment, and materials used in today’s manufacture of electronic assemblies. Combining lecture, videos and discussion, this Electronic Assembly Basic Training workshop was designed to give a very comprehensive and complete ‘immersion’ into SMT and mixed technology PCB assembly. As it runs only two days, it is extensive (and non- superfluous) without taking people ‘out of the shop’ for an extended period of time: learn, absorb and take that knowledge back to the manufacturing floor.
