Vice President of Technology, Indium Corporation, USA
Ning-Cheng Lee is the Vice President of Technology of Indium Corporation. He has been with Indium since 1986. Prior to joining Indium, he was with Morton Chemical and SCM. He has more than 20 years of experience in the development of fluxes and solder pastes for SMT industries. In addition, he also has very extensive experience in the development of underfills and adhesives. He received his PhD in polymer science from University of Akron in 1981, and BS in chemistry from National Taiwan University in 1973. Ning-Cheng is the author of “Reflow Soldering Processes and Troubleshooting: SMT, BGA, CSP, and Flip Chip Technologies” by Newnes, and co-author of “Electronics Manufacturing with Lead-Free, Halogen-Free, and Conductive-Adhesive Materials” by McGraw-Hill. He is also the author of book chapters for several lead-free soldering books. He received 1991 award from SMT Magazine and 1993 and 2001 awards from SMTA for best proceedings papers of SMI or SMTA international conferences, 2008 award from IPC for Honorable Mention Paper – USA Award of APEX conference, and Best Paper Award of SMTA China South 2010. He was honored as 2002 Member of Distinction from SMTA, 2003 Lead Free Co-Operation Award from Soldertec, 2006 Exceptional Technical Achievement Award from CPMT, 2007 Distinguished Lecturer from CPMT, 2009 Distinguished Author from SMTA, and 2010 Electronics Manufacturing Technology Award from CPMT. He serves on the board of governors for CPMT and served on the SMTA board of directors. Among other editorial responsibilities, he serves as editorial advisory board of Soldering and Surface Mount Technology, Global SMT & Packaging and as associate editor for IEEE Transactions on Components Packaging Manufacturing Technology. He has numerous publications and frequently gives presentations, invited to seminars, keynote speeches and short courses worldwide on those subjects at international conferences and symposiums.
Researcher & Development Manager, Fujifilm Electronics Materials, USA
Dr. Dory has extensive experience in microelectronics covering semiconductor fab processing and assembly, hybrid circuits, and package assembly & test. Dr. Dory retired from Intel Corporation in the Assembly and Test Technology Development Research division after 20 years in R&D. As Pathfinding Integration Manager of the Intel Substrate Technology Research Labs, he was responsible for development of advanced packaging technology in the areas of MEMS including wafer level bonding, stacked die packages, and line pitch reduction designs. He specialized in packaging and assembly, focusing on high density substrate manufacturing, and chip assembly including flip chip and stacked die and 3D packaging. He was awarded ten patents while at Intel in the areas of embedded package capacitors, underfill applications, and package design. He currently is the R&D manager for formulated products at Fujifilm Electronic Materials, USA.
Commodity Risk Assessment Engineer, Reliability and Risk Assessment Branch, NASA Goddard Space Flight Centre, USA
Mr. Bhanu Sood is a Center Lead and Commodity Risk Assessment Engineer at NASA Goddard Space Flight Center. Mr. Sood serves as an Agency expert and Center Specialist who manages overall Center development e orts pertaining to electronic circuit assemblies in Goddard Space Flight Center ground and flight missions. Mr. Sood serves as an Agency authority on technical committees and advisory groups and manages the establishment and implementation of new research, technology development and technology demonstration initiatives relating to electronic circuit assemblies. Mr. Sood’s areas of expertise include electronics supply chain risk/reliability assessment, root-cause failure analysis and strategies for counterfeit parts prevention. Prior to joining NASA, Mr. Sood was the Director of Test Services and Failure Analysis Laboratory at University of Maryland’s Center for Advanced Life Cycle Engineering (CALCE). In a 10+ year career at UMD, he managed reliability assessments and failure analysis of products from the aerospace, avionics, medical device, telecommunications, oil & gas and automotive industries. In his prior appointment at US Naval Research Laboratory (NRL), Mr. Sood worked on process development for 3D printing, printed micro-power sources, and laser-assisted stereo-lithography. Mr. Sood has authored over one hundred technical reports, several book chapters and over thirty scholarly and technical papers that were published in peer reviewed journals and conferences. Mr. Sood is the chair of three SAE Aerospace Standards Committees. He has participated in various conferences organizing committees and currently serves on the ASM Alloy Phase Diagram and ASM Emerging Technologies Awareness Committees. Mr. Sood holds one patent, and two invention disclosures, he is a senior member of IEEE and member of SAE and ASM.
President & Principal Consultant, ITM Consulting, USA
Phil Zarrow has been involved with PCB fabrication and assembly for more than thirty five years. His expertise includes the manufacture of equipment for circuit board fabrication and assembly of through-hole and surface mount technologies. In addition to his background in automated assembly and cleaning, Mr. Zarrow is recognized for his expertise in surface mount re ow soldering technology and in the design and implementation of SMT placement equipment and reflow soldering systems. Having held key technical and management positions with Vitronics Corporation, Excellon-Micronetics and Universal Instruments Corporation, he has extensive hands-on experience with set-up and troubleshooting through-hole and SMT processes throughout the world. During his tenure as Director of Technology Development for GSS/Array Technology, he was responsible for specifying and setting up medium- and high-speed assembly lines, as well as investigating and implementing emerging and leading-edge technologies, equipment and processes.
Mr. Zarrow is a popular speaker and workshop instructor. He has chaired and instructed numerous seminars and conferences in North and South America, Europe, South Africa, Australia and the Paci c Rim. He has published many technical papers and magazine articles as well as contributed a number of chapters to industry books. He is co-author of the book, "SMT Glossary- Terms and De nitions". Mr. Zarrow holds two US Patents concerning PCB fabrication and assembly processes and audit methodologies. Phil is a member of IPC, SME, IMAPS, a co-founder of ITM Incorporated, and is a past national level o cer and national director of the Surface Mount Technology Association (SMTA). He was also Chairman of the Re ow Committee for SMEMA. He was the recipient of the SMTA's Member of Distinction Award (1995) and Founders’ Award (2000). Mr. Zarrow has served on the Editorial Advisory Board for Circuits Assembly Magazine and won awards his writings "On the Forefront"and “Better Manufacturing” columns. He is currently producer and co-host of IPC Update’s “Boardtalk” audio program.
Associate Consultant, Malaysia
Shuras Vasu has served various multinational corporations, such as Sony, Motorola, Philips, and VDO in various function and Senior role. He has more than 24 years of operation excellence applying various analytical tools for decision making and continuous improvements. He carries with him strong expertise of Lean Six Sigma, Shop Floor Management, TPM,TQM,CQE and QMS. Shuras Vasu, holds a Bachelor Degree in Electrical Engineering graduated from University of Technology Malaysia and MBA from NTU Australia. He joined Sony Electronic Malaysia in 1991 as a Production Engineer and was responsible in establishing production standard for assembly operation, performing risk assessment for New Product Introduction, train new operators on the required SOP, work with CFT team on resolving production quality issues using QCC tools, work with design centre in Japan for design change matters and perform time study with Industrial Engineer to improve the productivity of the shop floor. He has Master Degree from Northern Territory University, Australia.
Shuras Vasu also implemented many TPM initiatives for his organization especially on the OEE improvement under the JIPM (Japan Institute of Plant Management, Japan). He had a great opportunity to implement the World Class Manufacturing System called New Shop Floor Management, a Japanese Way of Managing Shop Floor - Glass Wall Methodology (Kiyoshi Suzaki). In this program he managed to change the traditional way of running shop floor into a new ideology of using the Glass Wall Management, involving people into continuous improvement, created transparent management, linking KPI with the problem solving methodology and leadership development among the employee for continuous improvement. As a result of this program, the company key KPI improved tremendously and got the Asia Region and HQ USA recognition. With his leadership trait, he was promoted to Senior Manager (Operation) taking additional responsibilities of Quality Assurance Department. He than took the lead implementing a stringent Quality Management System in the organization such as Aerospace AS9100,VDA German Audit system,TS16949 and Risk Management Methodology. While in Textron, he implemented Factory Operation Excellence -Lean and Six Sigma Management. He managed to cut many of the NVA processes using the 7 waste methodologies and turned them into a cost saving & productivity improvement opportunity for the plant. He served Textron for 10 years. Shuras Vasu is a UK certified Lead Auditor for ISO9011/Ts16949 for 1st and 2nd party audit. He is very familiar with 5 core tools application for Automotive Manufacturer (APQP,PPAP,FMEA,SPC,MSA).He was MR (Management Representative) for more than 5 years –ISO9001/TS16949/AS9100.
Professor & Director, A.K Choudhury School of Information Technology, University of Calcutta
Dr. Amlan Chakrabarti is at present an Associate Professor and Cordinator at the A.K.Choudhury School of Information Technology, University of Calcutta. He is an M.Tech. from the University of Calcutta and has done his Doctoral research on Quantum Computing and related logic design at Indian Statistical Institute, Kolkata, 2004-2008. He was a Post-Doctoral fellow at the School of Engineering, Princeton University, USA during 2011-2012. He is the recipient of BOYSCAST fellowship award in the area of Engineering Science from the Department of Science and Technology Govt. of India in 2011 and Indian National Science Academy Visiting Scientist Fellowship in 2014. He has been involved in Electronic System Design and Manufacturing research projects funded by DRDO, DST, DAE, UGC, Ministry of Social Empowerment, TCS, TEQIP-II. He is the key member of the various International and National R&D projects in the area of hardware and firmware development for high speed circuits and systems, such as: FAIR Collaboration, Germany; CERN ALICE Collaboration, Geneva; Special Manpower Development Program in ESDM supported by Dept. of I.T., Govt. of India etc. He has published around 90 research papers in referred journals and conferences. He is a Sr. Member of IEEE, Member of ACM and life member of Computer Society of India. He has been the reviewer of IEEE Transactions on Computers, IET Computers & Digital Techniques, Elsevier Simulation Modeling Practice and Theory, Springer Journal of Electronic Testing: Theory and Applications. His research interests are: VLSI design, Embedded System Design, Quantum Computing, Video and Image Processing Algorithms and pattern recognition.